ASIC Layout Engineer (m/f/d) - A OT AESS

About the Position

We are seeking an ASIC Layout Engineer (m/f/d) to join our Advanced Electronics & Semiconductor Solutions (AESS) department in Timișoara, Romania.

Responsibilities

As an ASIC Layout Engineer, you will be responsible for generating block and chip layouts based on analog circuits and schematics. Your tasks will include:

• Creating and integrating analog layouts on block and top level
• Floor planning, pin placement, parasitic extraction
• Supporting design engineers to meet speed, area, power, DFM & ESD/EMV requirements
• Providing DRC, LVS & Tape out support

Requirements

• Master of Science / PhD in Electrical Engineering / Microelectronics / Physics or similar
• Bachelor degree in electronics engineering
• +2 years of layout design experience
• Good knowledge in the area of analog circuit layout
• Basic understanding of layout tools (design, DRC, LVS, Extraction)
• Basic knowledge of analog circuit design

Nice to Have

• Experience in doing layouts in BCD technology (Technologies: 65 - 180nm)
• Good knowledge in the area of deep sub micron effects (parasitics, coupling, matching etc.)

Languages

• Fluent English

We Offer

Ready to take your career to the next level? The future of mobility isn’t just anyone’s job. Make it yours! Join AUMOVIO. Own What’s Next.

About the Company

At AUMOVIO, we own what we do: Developing and producing hardware, software, and services that shape the future of mobility. But what truly sets us apart are our people. People who thrive in our winning culture, driven by bold ideas. People who take a leap and create meaningful difference-together. Because we believe that the future belongs to those who own it. That’s why we foster a culture where you own every step of the way.

Own your career, your growth, your skills, and your impact. Join us and own what’s next.

Advanced Electronics & Semiconductor Solutions (AESS) organization has been established in AUMOVIO to develop and manufacture semiconductors in a fabless model to fulfilling strategic internal semiconductor demands.