Job Description, Responsibilities & Requirements
About the Position
Custom SoCs (System on Chip) are at the heart of AWS Machine Learning servers. As a member of the Cloud-Scale Machine Learning Acceleration team, you'll be responsible for designing and optimizing hardware in our data centers, including AWS Inferentia and Trainium systems-our custom-designed machine learning inference and training servers. Our success depends on world-class server infrastructure as we handle massive scale and rapidly integrate emerging technologies. We're looking for an ASIC DFT Design Engineer to help us trailblaze new technologies and architectures while ensuring high design quality and making the right trade-offs.
Responsibilities
- Define and develop state-of-the-art Design for Test (DFT) architectures for advanced technology nodes
- Work closely with block designers and physical design (PD) team to implement highly efficient DFT solutions
- Perform RTL coding and Verification using Verilog/System Verilog
- Utilize industry standard DFT tools to create high coverage and cost-effective test patterns to target advanced silicon defects
- Participate in Silicon debug efforts alongside ATE and System teams
- Communicate and work with team members across multiple disciplines
Requirements
- Bachelor's degree in Electrical or Communications Engineering or a related field
- 5+ years of practical DFT experience with complex SoC designs in advanced technology nodes
- Experience with standard tools and practices in DFT, including ATPG, JTAG, MBIST and trade-offs between test quality and test time
- Experience with automation script development
Nice to Have
- Master's degree in Electrical or Communications Engineering or a related field
- Practical experience developing STA constraints for DFT modes and working directly with PD teams to close timing
- Experience with RTL coding and design verification (DV) flows
- Experience with gate-level simulation setup and debug with SDF
- Strong programming and scripting skills in Perl, Python or Tcl
- Practical experience with silicon debug and yield optimization
We Offer
- Competitive base salary range: 136,000.00 - 184,000.00 USD annually
- Comprehensive benefits including health insurance, 401(k) matching, paid time off, and parental leave
- Sign-on payments and restricted stock units (RSUs)
- Opportunity to work in a dynamic and innovative environment at Amazon
About the Company
Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status. Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit Amazon's accommodations page for more information.