Engineer - Physical design

About the Position

We are looking for a Physical Engineer specialized in building with 1–2 years of relevant experience to join our SoC implementation team. You will contribute to next-generation SoC projects, working across the synthesis-to-GDSII flow.

This role offers hands-on experience in physical implementation, timing analysis, debugging, and power, performance, and area (PPA) optimization. You will collaborate with design, verification, DFT, and physical IP teams, using scripting and AI-assisted workflows to improve engineering efficiency.

Responsibilities

• Complete and support RTL synthesis, floorplanning, placement, clock tree synthesis (CTS), routing, and GDSII generation with mentorship from senior engineers.
• Analyze and improve PPA through synthesis and physical implementation.
• Conduct static timing analysis with Synopsys PrimeTime, troubleshoot setup and hold violations, and assist in achieving timing closure across operating modes and corners.
• Review timing constraints, tool reports, and implementation results to identify issues, investigate root causes, and propose fixes.
• Assist with physical verification and final approval processes, including DRC, LVS, signal integrity, and EM/IR analysis.
• Develop Python and Tcl scripts to automate implementation tasks, analyze reports, and track quality.
• Use approved AI tools and agents to assist with scripting, report analysis, and debugging, while independently validating their outputs.
• Document results, communicate technical findings, and collaborate with teams to resolve implementation issues.

Requirements

• Bachelor’s or Master’s degree in Electronics, Electrical Engineering, Microelectronics, VLSI, or a related field.
• 1–2 years of relevant experience in ASIC/SoC physical design or implementation.
• Familiarity with the RTL-to-GDSII process, encompassing synthesis, floorplanning, placement, CTS, routing, and timing closure.
• Understanding of physical design fundamentals, including utilization, congestion, clock skew, latency, buffering, and cell sizing.
• Hands-on experience with PrimeTime and at least one synthesis or physical implementation tools such as Fusion Compiler, Genus, or Innovus.
• Knowledge of static timing analysis, including setup/hold checks, clock definitions, timing exceptions, and multi-mode, multi-corner analysis.
• Ability to read Verilog RTL and gate-level netlists and trace timing paths to investigate implementation issues.
• Practical programming skills in Python, familiarity with Tcl, and confidence working in a Linux environment.
• Strong analytical and debugging skills, clear communication, and a willingness to learn and take ownership of assigned tasks.

Nice to Have

• Exposure to advanced-node, hierarchical implementation, or large SoC integration.
• Familiarity with low-power concepts, UPF, multiple voltage domains, power gating, and level shifters.
• Exposure to on-chip variation, timing derates, crosstalk, and signal integrity.
• Basic knowledge of power distribution networks, EM/IR analysis, IO placement, and bump-planning considerations.
• Familiarity with DFT requirements and physical verification flows.
• Experience using AI coding assistants or agents for engineering automation, including effective task definition, output validation, and responsible handling of proprietary build data.

We Offer

• Competitive salary
• Opportunity to work in a dynamic and innovative environment
• Collaborative and inclusive workplace culture
• Professional development opportunities

About the Company

At Arm, we believe progress happens when people are empowered to think bigger and push beyond what seems possible. Our 10x mindset is about curiosity, ambition, and creating impact that will be used by millions. We learn fast, prioritize collaboration, and turn bold ideas into real technology. We look for people who are inspired by this way of working and want to grow in an environment where bold ideas are welcomed. Discover how the 10x mindset shapes life at Arm: https://careers.arm.com/10x-mindset

Equal Opportunities

Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and don’t discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.