Senior Digital Design Engineer

About the Position

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com.

We are looking for Digital Design Engineers with experience developing micro-architecture and implementation of the front-end circuit design, including RTL, synthesis, IP integration for high-performance network controllers. The candidate is preferred to have knowledge of communication/interface protocols such as PCI-Express (Gen-3 and above), Ualink, Esun, Ethernet, etc.

Responsibilities

• Develop micro-architecture and front-end circuit design
• Implement RTL, synthesis, and IP integration for high-performance network controllers
• Utilize knowledge of communication/interface protocols such as PCI-Express (Gen-3 and above), Ualink, Esun, Ethernet, etc.

Requirements

• Strong academic and technical background in electrical engineering. A Bachelor’s degree in EE is required, and a Master’s degree is preferred.
• Professional attitude with the ability to prioritize a dynamic list of multiple tasks.
• Entrepreneurial, open-mind behavior and can-do attitude.
• Authorized to work in the US and start immediately.
• Hands-on experience with high-speed protocols like PCIe, Ualink, Esun, Ethernet, etc.
• Proven front-end design skill – architecture, RTL, simulations, and synthesis.
• Experience with Synopsys and/or Cadence digital design tools/flows.
• Knowledge of design for test (DFT).
• Familiarity with UVM-based design verification.
• Silicon bring-up and debug experience.

Nice to Have

• Scripting with Python or other equivalent programming languages.
• Development/support for PCIe or Ethernet Switch products.

We Offer

• Competitive compensation package
• Opportunity to work with cutting-edge AI infrastructure technologies
• Collaborative and innovative work environment

About the Company

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com.