SeniorFPGA Developer

About the Position

We are seeking a Principal/Staff-level FPGA Engineer with 12-15 years of experience to define and drive FPGA architecture for our Communications Test & Measurement products.

Working for a global provider of network test, monitoring, and assurance solutions for telecommunications, cloud, enterprises, first responders, military, aerospace, and railway. A leader in light management technologies for 3D sensing, anti-counterfeiting, consumer electronics, industrial, automotive, government, and aerospace applications.

Employees working on this project are passionate about supporting customer success and we welcome people who bring their best every day to the company – to question, to collaborate, and to push for solutions that will delight our customers.

Responsibilities

• Define and drive end-to-end FPGA architecture for multi-gigabit designs.
• Make/buy tradeoffs on IP, floorplanning, and timing closure strategy.
• Implement DFX approach using Verilog/SystemVerilog/VHDL.
• Utilize industry-leading simulation, synthesis, place-and-route, and formal/UVM verification tools.
• Serve as the final technical escalation point for FPGA design and debug issues.
• Mentor other FPGA engineers.
• Lead root-cause debug of silicon and board bring-up issues.

Requirements

Must Have

• BS or MS degree in Electrical and/or Computer Engineering.
• Minimum of 12-15 years of relevant experience, including at least 5+ years specifically architecting and closing timing on multi-Gbps SerDes/transceiver-based FPGA designs.
• Demonstrated expertise in architecting and implementing high-speed FPGA designs using Verilog/SystemVerilog and/or VHDL.
• Deep, hands-on expertise with FPGA transceivers, hard IP, and PLLs, including timing closure, equalization, and link debug at multi-Gbps rates.
• Demonstrated experience closing timing and debugging link-layer issues on high-speed Ethernet (10M to 1.6T) and IP protocol stacks in production designs.
• Proven expertise with optical interfaces and modules (SFPs, QSFPs) in shipped products.
• Deep working knowledge of VLANs, MPLS, VPLS, and Voice/Video over IP (VoIP, IPTV).
• Extensive experience with AMD or Altera FPGA devices and their full implementation toolchains, including advanced timing closure and floorplanning techniques.
• Proven experience with formal verification and/or UVM-based verification methodologies.
• Demonstrated track record of taking FPGA designs from architecture through volume production, including systems-level tradeoffs across the HW/FW boundary.
• Version control experience using Git or similar tools.
• Exceptional written and oral communication skills, including the ability to mentor engineers and communicate architecture decisions with stakeholders across the world.
• Exceptional analytical and organizational skills, with an uncompromising commitment to accuracy and technical rigor in a fast-paced product environment.

Nice to Have

• Patents or published work in FPGA architecture, high-speed digital design, or DSP.
• Experience defining test strategies for multi-Gbps compliance testing.
• General purpose microprocessor and DSP systems, PCIe, high-speed digital board design, PLL design, and analog signal conditioning experience.
• Simulation experience using Siemens Questa, Aldec Riviera, or similar tools.
• Contribution to or deep familiarity with open verification methodologies (e.g., cocotb, UVM community contributions).
• Utilization of generative AI tools to assist in concept and implementation of FPGA designs.

We Offer

• Remote work options in Canada.
• Competitive compensation package.

About the Company

We are a global provider of network test, monitoring, and assurance solutions for telecommunications, cloud, enterprises, first responders, military, aerospace, and railway. A leader in light management technologies for 3D sensing, anti-counterfeiting, consumer electronics, industrial, automotive, government, and aerospace applications.