Sr Staff High-Speed Interface Verification Engineer

About the Position

We are looking for a Sr Staff High-Speed Interface Verification Engineer to join our team at Synopsys in Hyderabad, India. This role involves leading the verification of high-speed SerDes IP using UVM and SystemVerilog.

Responsibilities

• Lead verification of high-speed SerDes IP using UVM and SystemVerilog testbenches in mixed-signal co-simulation environments
• Define, track, and execute verification test plans for PCIE, Ethernet, USB3.1, and other high-speed protocols from architecture through tapeout
• Debug simulation failures across digital and analog domains, working directly with waveform viewers, mixed-signal simulators, and protocol analyzers
• Build and extend UVM testbenches with constrained random sequences, coverage models, and checkers that target real-world corner cases
• Collaborate daily with digital, analog, and mixed-signal design teams to align verification strategy with design intent and silicon bring-up realities
• Manage customer escalations by reproducing issues, root-causing failures, and driving resolution with engineering and field teams
• Drive pre-sales and post-sales technical discussions with customers, translating verification results into confidence and clarity

Requirements

• MTech or BTech in Electronics, Electrical Engineering, Computer Science, or equivalent with 7+ years of hands-on verification experience in ASIC or mixed-signal environments
• Deep expertise in UVM, SystemVerilog, and verification methodologies including constrained random testing, functional coverage, and assertions
• Proven experience with digital/analog co-simulation tools and methodologies, including AMS simulators and mixed-signal verification flows
• Working knowledge of high-speed interface protocols such as PCIE, Ethernet, or USB3.1, including protocol-level verification and compliance
• Strong understanding of the full ASIC development flow from architecture specification through RTL design, verification, and hardware bring-up
• Experience writing complex system-level testbenches in UVM, including sequence libraries, scoreboards, and protocol monitors
• Hands-on experience debugging waveform-level failures in both digital logic and analog circuit behavior

Nice to Have

• Experience with other high-speed interface protocols
• Familiarity with other verification tools and methodologies

We Offer

• Comprehensive range of health, wellness, and financial benefits
• Competitive salaries
• Opportunities for professional growth and development

About the Company

Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.