Tech Stack
Job Description, Responsibilities & Requirements
About the Position
Renesas India is seeking an experienced Staff / Senior Staff Physical Design Engineer to lead subsystem- and block-level physical implementation and closure for complex hierarchical SoCs at advanced technology nodes. This role requires deep expertise in timing, congestion, power integrity, and clocking methodologies, along with strong cross-functional collaboration skills. While this role does not own SoC-level physical design, it plays a critical role in aligning subsystem implementation with overarching SoC strategies.
Renesas is a leading electronics supplier globally, and this is a unique opportunity to directly influence the future products which will be offered to our customers in a new, fast-growing, and large Indian market with specific needs and applications.
Responsibilities
- Lead block- and subsystem-level physical design closure, including timing closure, congestion mitigation, power integrity, and overall physical implementation quality
- Collaborate closely with SoC-level physical design teams to align on clocking strategies, floorplanning intent, and integration requirements, without direct ownership of SoC-level execution
- Apply deep understanding of clocking methodologies to ensure subsystem-level clock domains integrate cleanly into the broader SoC clock architecture
- Develop, refine, and scale subsystem closure methodologies, flows, and automation, improving predictability, quality, and execution efficiency
- Mentor and guide physical design engineers within subsystem teams, promoting best practices, technical rigor, and methodology adoption
- Work cross-functionally with RTL design, STA, power, verification, and backend teams to ensure smooth handoffs and robust closure
- Proactively identify, assess, and mitigate physical design risks, coordinating closely with SoC teams to manage impacts and drive solutions
Requirements
- 5+ years of experience in physical design, with a strong focus on subsystem-level closure for complex hierarchical SoCs
- Strong expertise in:
- Timing closure and constraint management
- Congestion analysis and resolution
- Power integrity and power-aware physical implementation
- Block and subsystem-level physical design flows
- Solid understanding of SoC-level floorplanning and clocking methodologies, including:
- Clock domain partitioning
- Clock tree architecture
- Skew management
- Clock gating (Candidate is expected to collaborate effectively at the SoC level, not lead these activities.)
- Hands-on experience with industry-standard tools such as:
- Synopsys ICC2, Fusion Compiler, PrimeTime
- Cadence Innovus, Tempus, Certus
- Signoff and analysis platforms
- Proficiency in scripting and automation using Tcl, Python, and/or Perl
- Deep knowledge of end-to-end SoC design flows, with strong collaboration experience across timing, power, clocking, verification, and backend teams
- Strong understanding of low-power design techniques and power-aware implementation methodologies
Education
- B.Tech or M.Tech in Electronics and Communication, Electrical Engineering, Computer Science, or a related field
We Offer
- Opportunity to work in a growing market with significant government and university collaborations
- Be part of a global team that strives to develop a safer, healthier, greener, and smarter world
- Join a company committed to diversity and inclusion with a robust support system
About the Company
Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure, and IoT markets. Our robust product portfolio includes world-leading MCUs, SoCs, Analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world’s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you.
Renesas employees roughly 21,000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what’s next in electronics and the world.