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ASIC Physical Design, Sr Engineer

Synopsys·Salary not specified

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PythonPerl

Job description

About the Position

We are looking for an ASIC Physical Design, Sr Engineer to join our team at Synopsys in Ho Chi Minh, Vietnam. This role is pivotal in designing and developing cutting-edge semiconductor solutions, focusing on intricate tasks such as chip architecture, circuit design, and verification.

Responsibilities

  • Drive complete digital implementation from RTL to GDS for high-speed interface IPs including Serdes, DDR, HDMI, MIPI, and USB at 7nm, 5nm, and 3nm nodes.
  • Execute synthesis, floorplanning, power planning, clock tree synthesis, placement, routing, and physical verification using Synopsys EDA tools.
  • Perform static timing analysis and close timing across multiple process corners, voltages, and operating modes.
  • Run EMIR signoff, analyze IR drop and electromigration, and iterate on power grid design to ensure reliable silicon operation.
  • Build physical design methodologies and automation scripts using TCL, Python, Perl, and Make to improve efficiency across projects.
  • Collaborate with RTL designers, verification teams, product engineers, and customers to ensure timely delivery and resolve technical issues.
  • Provide technical support to customers during IP integration and debug design issues as they arise.

Requirements

  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or Computer Science.
  • 3+ years of hands-on experience in ASIC physical implementation, specifically RTL to GDS flows using industry-standard EDA tools.
  • Deep understanding of IC design fundamentals, physical implementation flows, and signoff methodologies for deep submicron designs.
  • Proficiency with industry-standard data formats including Verilog, GDS, LEF, DEF, SDF, LIB, UPF, CPF, and SPEF.
  • Strong scripting skills in TCL, Python, Perl, Unix Shell, and Make for automation and flow development.
  • Solid written and verbal communication skills in English for technical documentation and cross-functional collaboration.
  • Experience with Synopsys physical design tools such as Fusion Compiler, IC Compiler II, PrimeTime, or StarRC is a strong plus.

Nice to Have

  • Experience with Synopsys physical design tools such as Fusion Compiler, IC Compiler II, PrimeTime, or StarRC.

We Offer

  • Comprehensive range of health, wellness, and financial benefits.
  • Competitive salaries.
  • Opportunities for professional growth and development.

About the Company

Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.

Apply

Interested candidates can apply through our careers page.

© Synopsys. This job description was sourced from the employer's public career page. TheJob is not the employer — we index the posting and route candidates to the source. All content rights and hiring decisions belong to the employer.

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