Junior FPGA Engineer Electronic Warfare (All Genders)

About the Position

Junior FPGA Engineer Electronic Warfare (All Genders)

Berlin, Germany

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About the Team

STARK's Electronic Warfare team is a systems-focused engineering group delivering software-defined, mass-scalable RF solutions for autonomous systems. Combining deep domain expertise in hardware board design, thermal/structural packaging, real-time C++ signal processing, and resilient directional mesh networking, we rapidly build field-advanced EW capabilities designed to survive and operate in contested spectrum environments.

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Your Mission

As a Junior FPGA Engineer, you will join our specialized hardware team to develop the high-speed digital logic that powers our autonomous platforms. You will be responsible for designing, implementing, and testing FPGA-based solutions that process complex signals in real-time.

This role is ideal for a high-potential engineer who wants to move beyond simulation and see their code interact with the physical world. You will work closely with senior mentors to bridge the gap between digital signal processing theory and hardware realization.

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Responsibilities

• RTL Design: Develop and maintain high-speed digital logic using VHDL, Verilog, or SystemVerilog.
• Verification: Create testbenches and run functional simulations to validate design behavior.
• Hardware Debugging: Use lab equipment (Oscilloscopes, Logic Analyzers) and on-chip debugging tools (ILA/Signal Tap) to troubleshoot physical hardware.
• Integration: Collaborate with Electronics and Software teams to define FPGA pinouts, review schematics, and develop interface APIs.
• IP Management: Integrate and configure third-party IP cores and interface with high-speed ADCs/DACs.
• Documentation: Maintain clear design specifications, register maps, and version-controlled HDL repositories.

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Requirements

• Proficiency in VHDL, Verilog, or SystemVerilog.
• Experience with FPGA vendor tools (e.g., Xilinx Vivado or Intel Quartus).
• Understanding of Digital Signal Processing (DSP) fundamentals.
• Basic experience with simulation tools (e.g., ModelSim, Questa).
• Familiarity with common hardware interfaces (AXI, SPI, I2C, UART).
• Competency in Python or C/C++ for scripting and testing support.
• Bachelor’s or Master’s degree in Electrical, Electronic, or Computer Engineering.
• 0-2 years of experience (relevant internships or personal hardware projects are highly valued).
• A deep desire to understand how things work at the register level.
• Enjoyment of the "puzzle" of hardware debugging and timing closure.
• Ability to explain your logic design clearly to both software and hardware teams.

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Nice to Have

• Knowledge of System-on-Chip (SoC) architectures (e.g., Zynq).
• Familiarity with Linux-based development environments.
• Interest in software-defined radio (SDR) architectures.

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