Senior DDR & Execution Validation Engineer

About the Position

Senior DDR & Execution Validation Engineer

Location: Bengaluru, India

Reporting to the Memory Validation leadership team, the Senior Silicon DDR/HBM Validation Engineer will be responsible for the bring-up, validation, characterization, and debug of advanced memory subsystems used in next-generation AI compute platforms.

The role will focus on DDR and HBM technologies, working closely with silicon design, firmware, characterization, platform, and systems teams to ensure robust memory subsystem functionality, performance, and reliability. The successful candidate will take ownership of significant validation activities, contribute to debug and root-cause analysis efforts, and help improve validation methodologies, automation, and infrastructure.

Responsibilities

• Execute validation and bring-up activities for DDR and HBM memory subsystems
• Verify memory bring-up software, firmware, and scripts against defined project requirements
• Debug firmware, hardware, and system-level issues and contribute to root-cause analysis activities
• Analyze system logs, validation data, and characterization results to identify failures and performance issues
• Perform PHY characterization and analog-level analysis during stress testing and validation activities
• Develop and execute functional, stress, performance, and corner-case validation tests
• Perform signal integrity, voltage, frequency, and timing measurements using laboratory instrumentation
• Characterize memory bandwidth, latency, training behavior, and subsystem stability across operating conditions
• Develop Python-based automation, test infrastructure, and reporting tools to improve validation efficiency
• Collaborate with architecture, RTL, firmware, and platform teams to investigate and resolve technical issues
• Contribute to memory subsystem debug activities spanning silicon, firmware, board, and system domains
• Support the development of validation methodologies, debug procedures, and reporting frameworks
• Contribute to the continuous improvement of validation infrastructure and engineering processes
• Support silicon characterization, production readiness, and qualification activities
• Document validation results and communicate findings to the wider engineering team

Requirements

Essential

• Strong experience validating DDR, LPDDR, HBM, or related DRAM technologies
• Deep understanding of DRAM architecture, memory subsystem operation, and memory controller functionality
• Experience with firmware, BIOS, and Embedded C development
• Strong programming skills in C and Python
• Hands-on experience using laboratory equipment including oscilloscopes and related measurement instrumentation
• Experience interfacing with low-speed peripherals including GPIO, SPI, I2C, and UART/serial interfaces
• Experience performing functional testing and signal measurements including voltage, frequency, and timing analysis
• Strong knowledge of embedded systems and microcontroller-based platforms
• Hands-on experience with board bring-up and hardware validation activities
• Experience debugging complex hardware, firmware, and system-level issues
• Experience performing silicon characterization and analyzing validation results
• Strong analytical, diagnostic, and problem-solving skills
• Excellent communication and collaboration skills with the ability to work effectively across multidisciplinary teams

Desirable

• Experience with memory IP bring-up environments, firmware, or validation software
• Experience with DDR or HBM PHY behavior, memory controller architectures, training algorithms, and calibration flows
• Knowledge of memory subsystem performance analysis and workload characterization
• Experience with memory margining, stress testing, and reliability validation
• Familiarity with JTAG, trace infrastructure, and low-level debug tools
• Experience with high-performance compute, AI accelerator, or data center systems
• Understanding of signal integrity and power integrity considerations in high-speed memory systems
• Experience developing validation automation frameworks and regression environments
• Experience supporting first-silicon bring-up and production readiness activities

We Offer

• Opportunity to work in a cutting-edge AI technology company
• Collaborative and innovative work environment
• Competitive compensation package
• Professional growth and development opportunities

About the Company

The Memory Validation team sits within the Validation organization and is responsible for the bring-up, validation, characterization, and debug of memory subsystems across Graphcore silicon and platform products. The team supports DDR and HBM validation activities throughout the product lifecycle, from first silicon through production readiness. Engineers work closely with architecture, RTL, firmware, characterization, systems, and platform teams to ensure memory technologies meet functionality, performance, reliability, and performance objectives.